Our client is seeking an intelligent, versatile, hardware engineer to expand our ASIC and FPGA design group.
You will join a team of digital, analog and mixed signal ASIC designers involved in full custom, standard cell and gate array implementations of diverse products.
Designs may include designing and integrating macrocells such as static RAMs, transceivers, processors, compression algorithms and analog transceivers, regulators, sensors, and data converters.
You will have the opportunity to be involved in all aspects of the ASIC design flow including specification, behavioral and RTL coding, transistor-level analog design, testbench development, code coverage analysis, gate-level synthesis, place and route, clock-tree insertion, scan insertion, formal verification, timing analysis, and physical verification.
Essential Duties and Responsibilities
Design Digital Hardware in Verilog or VHDLDesign Analog Hardware at the ASIC Transistor Level
Create Testbenches for Analog and Digital Hardware
Capture Requirements By Interacting With Customers
Perform Physical Verification such as DRC, LVS, and LPE
Present Customer Status Reports
B.S. In Electrical or Computer Engineering
Desired knowledge of languages: VHDL, Verilog
Desired knowledge of tools: Synopsis, Cadence or Mentor Graphics IC design, layout and verification tools
Strong communication skills
Must be cleared (TS/SCI with Full Scope Poly)